\doxysection{USB\+\_\+\+OTG\+\_\+\+Host\+Channel\+Type\+Def Struct Reference}
\hypertarget{struct_u_s_b___o_t_g___host_channel_type_def}{}\label{struct_u_s_b___o_t_g___host_channel_type_def}\index{USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}}


USB\+\_\+\+OTG\+\_\+\+Host\+\_\+\+Channel\+\_\+\+Specific\+\_\+\+Registers.  




{\ttfamily \#include $<$stm32h723xx.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_u_s_b___o_t_g___host_channel_type_def_a6f1e046a654010fb0da5eec942fb9a8d}{HCCHAR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_u_s_b___o_t_g___host_channel_type_def_a23b3abb27cf5acff0edc709c90e2e5cb}{HCSPLT}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_u_s_b___o_t_g___host_channel_type_def_a6735bbd8fbc28f897f1b44df95f52873}{HCINT}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_u_s_b___o_t_g___host_channel_type_def_a8edfae19390d323525449d2444e93984}{HCINTMSK}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_u_s_b___o_t_g___host_channel_type_def_a14cb8c8dbbafdef182c82c0493ca48ab}{HCTSIZ}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_u_s_b___o_t_g___host_channel_type_def_a4204a2dcbc14fb11d371fc45b9f3170f}{HCDMA}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_u_s_b___o_t_g___host_channel_type_def_aa85d014d19b79d61bed7fdf134ed1037}{Reserved}} \mbox{[}2\mbox{]}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
USB\+\_\+\+OTG\+\_\+\+Host\+\_\+\+Channel\+\_\+\+Specific\+\_\+\+Registers. 

\label{doc-variable-members}
\Hypertarget{struct_u_s_b___o_t_g___host_channel_type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_u_s_b___o_t_g___host_channel_type_def_a6f1e046a654010fb0da5eec942fb9a8d}\index{USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}!HCCHAR@{HCCHAR}}
\index{HCCHAR@{HCCHAR}!USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}}
\doxysubsubsection{\texorpdfstring{HCCHAR}{HCCHAR}}
{\footnotesize\ttfamily \label{struct_u_s_b___o_t_g___host_channel_type_def_a6f1e046a654010fb0da5eec942fb9a8d} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t USB\+\_\+\+OTG\+\_\+\+Host\+Channel\+Type\+Def\+::\+HCCHAR}

Host Channel Characteristics Register 500h \Hypertarget{struct_u_s_b___o_t_g___host_channel_type_def_a4204a2dcbc14fb11d371fc45b9f3170f}\index{USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}!HCDMA@{HCDMA}}
\index{HCDMA@{HCDMA}!USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}}
\doxysubsubsection{\texorpdfstring{HCDMA}{HCDMA}}
{\footnotesize\ttfamily \label{struct_u_s_b___o_t_g___host_channel_type_def_a4204a2dcbc14fb11d371fc45b9f3170f} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t USB\+\_\+\+OTG\+\_\+\+Host\+Channel\+Type\+Def\+::\+HCDMA}

Host Channel DMA Address Register 514h \Hypertarget{struct_u_s_b___o_t_g___host_channel_type_def_a6735bbd8fbc28f897f1b44df95f52873}\index{USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}!HCINT@{HCINT}}
\index{HCINT@{HCINT}!USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}}
\doxysubsubsection{\texorpdfstring{HCINT}{HCINT}}
{\footnotesize\ttfamily \label{struct_u_s_b___o_t_g___host_channel_type_def_a6735bbd8fbc28f897f1b44df95f52873} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t USB\+\_\+\+OTG\+\_\+\+Host\+Channel\+Type\+Def\+::\+HCINT}

Host Channel Interrupt Register 508h \Hypertarget{struct_u_s_b___o_t_g___host_channel_type_def_a8edfae19390d323525449d2444e93984}\index{USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}!HCINTMSK@{HCINTMSK}}
\index{HCINTMSK@{HCINTMSK}!USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}}
\doxysubsubsection{\texorpdfstring{HCINTMSK}{HCINTMSK}}
{\footnotesize\ttfamily \label{struct_u_s_b___o_t_g___host_channel_type_def_a8edfae19390d323525449d2444e93984} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t USB\+\_\+\+OTG\+\_\+\+Host\+Channel\+Type\+Def\+::\+HCINTMSK}

Host Channel Interrupt Mask Register 50Ch \Hypertarget{struct_u_s_b___o_t_g___host_channel_type_def_a23b3abb27cf5acff0edc709c90e2e5cb}\index{USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}!HCSPLT@{HCSPLT}}
\index{HCSPLT@{HCSPLT}!USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}}
\doxysubsubsection{\texorpdfstring{HCSPLT}{HCSPLT}}
{\footnotesize\ttfamily \label{struct_u_s_b___o_t_g___host_channel_type_def_a23b3abb27cf5acff0edc709c90e2e5cb} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t USB\+\_\+\+OTG\+\_\+\+Host\+Channel\+Type\+Def\+::\+HCSPLT}

Host Channel Split Control Register 504h \Hypertarget{struct_u_s_b___o_t_g___host_channel_type_def_a14cb8c8dbbafdef182c82c0493ca48ab}\index{USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}!HCTSIZ@{HCTSIZ}}
\index{HCTSIZ@{HCTSIZ}!USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}}
\doxysubsubsection{\texorpdfstring{HCTSIZ}{HCTSIZ}}
{\footnotesize\ttfamily \label{struct_u_s_b___o_t_g___host_channel_type_def_a14cb8c8dbbafdef182c82c0493ca48ab} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t USB\+\_\+\+OTG\+\_\+\+Host\+Channel\+Type\+Def\+::\+HCTSIZ}

Host Channel Transfer Size Register 510h \Hypertarget{struct_u_s_b___o_t_g___host_channel_type_def_aa85d014d19b79d61bed7fdf134ed1037}\index{USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}!Reserved@{Reserved}}
\index{Reserved@{Reserved}!USB\_OTG\_HostChannelTypeDef@{USB\_OTG\_HostChannelTypeDef}}
\doxysubsubsection{\texorpdfstring{Reserved}{Reserved}}
{\footnotesize\ttfamily \label{struct_u_s_b___o_t_g___host_channel_type_def_aa85d014d19b79d61bed7fdf134ed1037} 
uint32\+\_\+t USB\+\_\+\+OTG\+\_\+\+Host\+Channel\+Type\+Def\+::\+Reserved\mbox{[}2\mbox{]}}

Reserved 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+CMSIS/\+Device/\+ST/\+STM32\+H7xx/\+Include/\mbox{\hyperlink{stm32h723xx_8h}{stm32h723xx.\+h}}\end{DoxyCompactItemize}
